Fundamental to the operation of any computer is the microprocessor. The microprocessor performs a number of arithmetic or logical "bitwise" calculations on its various inputs. One necessary arithmetic operation inherent in most advanced integrated circuit components, particularly microprocessors, is the ability to increment numbers in order to monitor the occurrence of events during each clock cycle.
Throughout the development of integrated circuit components, a constant emphasis has been placed on increasing their speed of operation. Typically, this is accomplished by reducing signal propagation delays encountered by the integrated circuit component in completing a particular arithmetic operation.
FIG. 1 shows one prior art method of incrementing, using an n-bit ripple-carry incrementor. The n-bit ripple-carry incrementor 100 includes n identical cells 100a-100n, where n is an arbitrary integer. The n identical cells 100a-100n are connected in series. Each of these cells receives the carry output of the previous cell. The first cell 100a has as an input the carry input co!, while each of the other cells receives the carry output of the previous cell. Thus, cell 100k receives ck-1! from cell 100k-1!. Each cell also has as an input an input operand An!, Ao! through An-1! respectively.
Each cell 105a-105i of the ripple-carry incrementor 100 comprises a XOR gate 110a-110n and an AND gate 115a-115n, which collectively enable each cell 100a-100n to perform two logical operations. Using the K&lt;th&gt; cell for illustrative purposes, its XOR gate 110k receives a ripple carry propagate "Ck-1!" bit from the K-1&lt;th&gt; cell (not shown) via a first input line 120 and an Ak-1! input bit via a second input line 125. Based on these inputs, the XOR gate 100k produces a real bit sum Sk-1! which is output from the incrementor 100 through a first output line 130. The K&lt;th&gt; cell also produces a ripple carry propagate "Ck!" bit via a second output line 135. The Ck! bit is a product of the Ck-1! bit logically AND'ed with the Ak-1! input bit.
Although the conventional ripple-carry incrementor 100 is simple and requires little area and device count being the overall number of transistors required by the incrementor, its total signal propagation delay to calculate the real bit sum "Sn!" is large due to serial propagation of each ripple carry propagate. For example, for an n-bit ripple-carry incrementor, the total signal propagation delay is approximately equal to n gate delays. Thus, the ripple carry incrementor is slow.
Generally, it is desirable to decrease the total signal propagation delay in order to increase the operational speed of the incrementor. This may be accomplished by sacrificing some area and device count. For example, incrementors using carry lookahead or Kogge-Stone techniques are specifically designed to reduce signal propagation delay. Unfortunately, these incrementors require significantly larger area and device count than conventional ripple carry incrementors.
Therefore what is needed is an incrementor that is faster than the ripple carry while requiring less area and fewer devices.